This year marks the 25th anniversary of a groundbreaking program that has introduced tens of thousands of engineering students to the real world of integrated circuit design. The program, run by a not-for-profit organization called MOSIS (Metal Oxide Semiconductor Implementation Service), manufactures working prototypes of the students’ integrated circuit designs free of charge. Based at the University of Southern California’s Information Sciences Institute, in Marina Del Rey, MOSIS also gives businesses, universities, and government labs a means of inexpensively producing prototypes.

IEEE Member César Piña with a sample integrated circuit wafer from his MOSIS lab.

Many chip designers have few options for getting their devices built, explains MOSIS’s director, IEEE Member César Piña. Scheduling a run at a wafer fabrication plant would be prohibitively expensive for students, not to mention university and government researchers and startup companies. The smallest run possible is typically 12 wafers, which can cost more than US $50 000 after tallying up the cost of materials, photolithography, and fabrication, he says.

PIGGYBACK FABS MOSIS pools designs, putting on a single 20- or 30-centimeter wafer perhaps hundreds of individual IC chips [see photo]. MOSIS then contracts with established wafer fabricators, such as IBM Corp. or Taiwan Semiconductor Manufacturing Co., to process the wafer.

Students and some researchers who don’t have outside funding pay nothing for the service. Other designers at start-ups as well as larger companies, government labs, and universities, share the cost of wafer fabrication. Even established companies that own a wafer fab use MOSIS to execute their prototypes, Piña says; it’s cheaper than interrupting their own production runs. Over the years, a number of designs that later became huge commercial successes have come through MOSIS, including the world’s first reduced instruction set computer-based (RISC) microprocessors.

Piña has been involved with MOSIS from the start. From 1980 to 1987, while at the Jet Propulsion Laboratory (JPL), in Pasadena, Calif., Piña led a project funded by the U.S. Defense Advanced Research Projects Agency to develop CMOS test structures for determining how well a MOSIS wafer was moving through the fabrication process. In 1990, he became the director of MOSIS. “I originally thought I’d stay for three or four years,” Piña says, sitting in his seventh-floor corner office overlooking the harbor at Marina del Rey. “That was, well, a lot of years ago.”

CONCEPT FOR PROTOTYPES The concept behind MOSIS was first put forward by Carver Mead and Lynn Conway. In their breakthrough text, Introduction to VLSI Systems, published in 1979, the two described how, with a simple set of design rules, any engineer could easily make a prototype of an IC. “All you’d need is access to a computer,” Piña says. “Then you’d send your design to a fabricator and get the thing made.” It was a revolutionary idea at the time, but as more chip designers realized the advantages, it took off.

Piña is familiar with revolutions: he was born and raised in Cuba and lived there through the tumultuous period when Fidel Castro and his followers prepared to wrest power from the ruling party.

As a boy, he was homeschooled by his father until he was nine because there were no decent schools in their Cuban town. Piña remembers poring over the comics while sitting on his father’s lap. “He would read aloud to me, and I guess he would also sound out letters and words. One day I asked him to read something for me, and he said, ‘Go ahead and read it yourself.’ To my amazement, I could.”

When Piña was in sixth grade, his father got a job at the U.S. naval base at Guantanamo Bay, and Piña began attending school there, alongside the sons and daughters of U.S. military personnel. He learned English so well that at the age of 16, he enrolled in the University of Michigan, in Ann Arbor, graduating with a bachelor’s in aerospace engineering.

While in college, Piña met student Marilyn Wohl, and in 1958, they married and returned for a few months to a Cuba in turmoil. It was just before Castro came to power in February 1959. “I told my wife, ‘You’re lucky. Not everybody gets a revolution on her honeymoon.’ ”

In October 1958 the couple left Cuba for the United States. With the Cold War in full swing, there was a huge demand for engineers—but not ones from Cuba. “The only industry that didn’t seem to care where I was from was semiconductors,” Piña recalls. His first job was with Raytheon’s semiconductor division, outside Boston. His education didn’t exactly equip him for a job in the chip industry, but then the field was very new, so the learning curve wasn’t too difficult. “I spent the first two weeks reading the June 1956 Proceedings of the IEEE—the special semiconductor issue—and [William B.] Shockley’s Electrons and Holes in Semiconductors.”

After he’d been at Raytheon a year, his wife persuaded him to relocate to the Midwest to be closer to her family. During the next two decades, his career mirrored the ups and downs of the chip industry; all of the chip companies he has worked for have either been sold or gone out of business. In Chicago, he worked for Hoffman Electronics, a small chip firm, for six years before taking a job with Continental Devices, a small semiconductor company near Los Angeles.

In 1971, Piña decided to branch out on his own, founding Regulus Semiconductor, which he named with great hope after a bright star in the constellation Leo. One of Regulus’s products was an electronic interlock that wouldn’t let a car start unless the driver’s seat belt was fastened. “Nobody liked that,” Piña recalls, and the idea died when Congress passed a law making such a device optional for U.S. cars. Four years later, with five small children at home, he was forced to sell the company and take a job with Micro Semiconductor, another small chip company in Los Angeles, where he worked for five years before joining JPL.

While at JPL, he earned a master’s degree in applied mathematics from Claremont University, in California, and he has continued a collaboration with the school of mathematical sciences there. One area he’s been exploring at MOSIS is the use of boundary layer methods and other mathematical techniques to understand semiconductor behavior. “For example, on a CMOS device, you have one region where the current changes very rapidly with respect to the voltage and another region where the current changes very slowly,” Piña explains. The equations in each region can be solved separately and then “matched” or “blended” to obtain a single, continuous equation. The method is now being extended to include quantum effects, which have become significant as device dimensions decrease below 90 nanometers.

Though he never planned to stay so long, Piña has no desire to move on from MOSIS. “My wife always asks, ‘When are you going to retire?’ To be honest, I don’t know what else I’d do that would be as interesting.”

For more information on MOSIS, visit http://www.mosis.org